A model for the channel potential of charge-trapping memories and its implications for device scaling

Solid-State Electronics

Volumn 49, Issue 11 SPEC. ISS., 2005, Pages 1754-1758

  Sadd, M ^a   Anderson, S G H ^a   Hradsky, B ^a   Muralidhar, R ^a   Prinz, E J ^a   Rao, R ^a   Straub, S ^a   Steimle, R F ^a   Swift, C T ^a   White, B E ^a   Yater, J A ^a  

^a FREESCALE SEMICONDUCTOR INC   (United States)

Author keywords

Channel potential; Nano crystal; Non uniform trapping

Indexed keywords

COMPUTER SIMULATION; NANOSTRUCTURED MATERIALS; THRESHOLD VOLTAGE;

CHANNEL POTENTIAL; CHARGE-TRAPPING MEMORIES; NANO-CRYSTALS; NON-UNIFORM TRAPPING;

DATA STORAGE EQUIPMENT;

EID: 28044452165     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2005.10.009     Document Type: Article

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