Specification of timing constraints within the Circal process Algebra

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1349, Issue , 1997, Pages 108-122

  Cerone, Antonio ^a   Milne, George J ^a  

^a UNIVERSITY OF SOUTH AUSTRALIA   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

SOFTWARE ENGINEERING; TIMING CIRCUITS;

ASYNCHRONOUS HARDWARE; CONSTRAINT BASED MODELLING; NATURAL REPRESENTATION; PROCESS ALGEBRAS; TIME MODEL; TIMING CONSTRAINTS;

ALGEBRA;

EID: 28044443122     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/bfb0000466     Document Type: Conference Paper

References (21)

1. A. Bailey, G. A. McCaskill, and G. J. Milne. An Exercise in the Automatic Verification of Asynchronous Designs. Formal Methods in System Design, 4(3), pp. 213-242, May 1994.
2. T. Bolognesi, and E. Brinksma. Introduction to the ISO specification language LOTOS. Computer Networks and ISDN Systems, 14(1), pp. 25-59, 1987.
3. A. Cerone, A Net-based Approach for Specifying Real-Time Systems, Ph.D. thesis, TD-16/93, University of Pisa, Department of Computer Science, Pisa, Italy, 1993.
4. A. Cerone, A. J. Cowie, G. J. Milne, and P. A. Moseley. Description and Verification of a Time-Sensitive Protocol. Technical Report CIS-96-009, University of South Australia, School of Computer and Information Science, Adelaide, Australia, October 1996. http://www.cis.unisa.edu.au/cgi-bin/techreport?CIS-96-009
5. A. Cerone, A. J. Cowie, G. J. Milne and P. A. Moseley. Modelling a Time- Dependent Protocol using the Circal Process Algebra. In O. Maler (ed.), Proc. of the International Workshop on Hybrid and Real-Time Systems, Grenoble, France, March 1997, Lecture Notes in Computer Science 1201, pp. 124-138, Springer, Berlin, Germany, 1997.
6. A. Cerone, D. A. Kearney and G. J. Milne. Verifying Bounded Delay Asynchronous Circuits using Time Relationship Constraints. Technical Report CIS-97- 012, University of South Australia, School of Computer and Information Science, Adelaide, Australia, August 1997. http://www.cis.unisa.edu.au/cgi-bin/techreport?CIS-97-012
7. A. Cerone and A. Maggiolo-Schettini. Time-based Expressivity of Timed Petri Nets. Technical IB 12/95, Goethe University, Department of Computer Science, Frankfurt am Main, Germany, July 1995. http://www.cis.unisa.edu.au/staff/cerone.a./abstracts/frankfurt 95.html
8. A. Cerone and A. Maggiolo-Schettini. Time-based Expressiveness of Timed Petri Nets for System Specification. To appear in Theoretical Computer Science.
9. E. M Clarke, E. A. Emerson and A. P. Sistla. Automatic Verification of Finitestate Concurrent Systems Using temporal logic specifications. A CM Transactions on Programming Languages and Systems, 8(2), pp. 244-263, 1986.
10. M. Hennessy and. T. Regan. A Process Algebra for Timed Systems. Information and Computation, 117, pp. 221-239, 1995.
11. C. A. R. Hoare. Communication Sequential Processes. International Series in Computer Science. Prentice Hall, 1985.
12. N. G. Leveson and J. L. Stolzy, Safety Analysis Using Petri Nets, IEEE Transactions on Software Engineering, 13, pp. 386-396, 1987.
13. K. L. McMillan. Symbolic model checking. Kluwer Academic Publishers, 1993.
14. P. M. Merlin and D. J. Farber, Recoverability of Communication Protocols -- Implication of a Theoretical Study, IEEE Transactions in Software Communications, 24, pp. 1036-1043, 1976.
15. G. J. Milne. The Formal Description and Verification of Hardware Timing. IEEE Transactions on Computers, 40(7), pp. 811-826, July 1991.
16. G. J. Milne. Formal Specification and Verification of Digital Systems. McGraw- Hill, 1994.
17. R. Milner. Communication and Concurrency. International Series in Computer Science. Prentice Hall, 1989.
18. F. Moller. The Semantics of Circal. Technical Report HDV-3-89, University of Strathclyde, Department of Computer Science, Glasgow, UK, 1989.
19. I. E. Sutherland. Micropipelines. Com. of ACM, 32(6), pp. 720-738, Jun 1989.
20. C. A. Vissers, G. Scollo, M. van Sinderen and E. Brinksma. Specification Styles in Distributed Systems Design and Verification. Theoretical Computer Science, 89, pp. 179-206, 1991.
21. B. Walter, Timed Petri-Nets for Modelling and Analyzing Protocols with Real- Time Characteristics. In H. Rudin and C. H. West eds., Proc. of the 3rd IFIP Workshop on Protocol Specification, Testing, and Verification, pp. 149-159, North Holland, Amsterdam, The Netherlands, 1983.