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Volumn A, Issue , 2004, Pages
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FPGA implementation of an integer MIPS processor in Handel-C and its application to human face detection
a b c |
Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER ARCHITECTURE;
COMPUTER HARDWARE DESCRIPTION LANGUAGES;
FACE RECOGNITION;
IMAGE PROCESSING;
INTEGER PROGRAMMING;
PROGRAM PROCESSORS;
REAL TIME SYSTEMS;
FPGA IMPLEMENTATION;
HUMAN FACE DETECTION;
INTEGER-BASED MIPS PROCESSORS;
REAL-TIME IMAGE PROCESSING;
FIELD PROGRAMMABLE GATE ARRAYS;
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EID: 27944489610
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (9)
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References (7)
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