Variations-aware low-power design with voltage scaling

Proceedings - Design Automation Conference

Volumn , Issue , 2005, Pages 529-534

  Azizi, Navid ^a   Khellah, Muhammad M ^b   De, Vivek ^b   Najm, Farid N ^a  

^a UNIVERSITY OF TORONTO   (Canada)

^b INTEL CORPORATION   (United States)

Author keywords

Low Voltage; Parallel Systems; Process Variations

Indexed keywords

ELECTRIC POTENTIAL; PROCESS CONTROL;

PARALLEL SYSTEMS; PROCESS VARIATIONS; WITHIN-DIE (WID) PROCESS;

AUTOMATION;

EID: 27944461412     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/dac.2005.193866     Document Type: Conference Paper

References (11)

1. J. Schutz and C. Webb. A scalable X86 CPU design for 90nm process. ISSCC, 2004.
2. A. P. Chandrakasan and R. W. Brodersen. Low Power Digital CMOS Design. Kluwer Academic Publishers, 1995.
3. D. Liu and C. Svensson. Trading speed for low power by choice of supply and threshold voltages. IEEE Journal of Solid-State Circuits, 28(1):10-17, January 1993.
4. C. Kim, H. Soeleman, and K. Roy. Ultra-low-power DLMS adaptive filter for hearing aid applications. IEEE Transactions on VLSI, 11(6):1058-1067, December 2003.
5. M. Eisele, et al. The impact of intra-die device parameter variations on path delays and on the design for yield of low voltage digital circuits. IEEE Transactions on VLSI, 5(4):360-368, December 1997.
6. D. Boning and S. Nassif. Models of process variations in device and interconnect. In A. Chandrakasan, W. J. Bowhill, and F. Fox, editors, Design of High-Performance Microprocessor Circuits. IEEE Press, New York, NY, 2001.
7. http://www-device.eecs.berkeley.edu/~ptm/.
8. D. Lee, W. Kwong, D. Blaauw, and D. Sylvester. Simultaneous subthreshold and gate-oxide tunneling leakage current analysis in nanometer CMOS design. ISQED, pages 287-292, 2003.
9. W.K. Henson et al. Analysis of leakage currents and impact on off-state power consumption for CMOS technology in the 100-nm regime. IEEE Transactions on Electron Devices, 47(2):440-447, February 2000.
10. Y.L. Tong. The Multwariate Normal Distribution. Springer-Verlang, 1990.
11. B. H. Calhoun, A. Wang, and A. Chandrakasan. Device sizing for minimum energy operation in subthreshold circuits. Custom Integrated Circuits Conference, 2003.