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Volumn , Issue , 1999, Pages 104-107

Cost/performance trade-off in floating-point unit design for 3D geometry processor

Author keywords

[No Author keywords available]

Indexed keywords


EID: 27944442332     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APASIC.1999.824039     Document Type: Conference Paper
Times cited : (7)

References (11)
  • 2
    • 0027809247 scopus 로고
    • Graphics rendering architecture for a high performance desktop wrokstation
    • Chaadell B. Harell, Farhad Fouladi, "Graphics Rendering Architecture for a High Performance Desktop Wrokstation, " In Proceeding of SIGGRAPH '93, pp. 93-99, 1993
    • (1993) Proceeding of SIGGRAPH , vol.93 , pp. 93-99
    • Harell, C.B.1    Fouladi, F.2
  • 4
    • 84971449699 scopus 로고
    • A parallel processor architecture for graphics arithmetic operations
    • John G. Torborg, "A Parallel Processor Architecture for Graphics Arithmetic Operations, " In Proceeding of SIGGRAPH '87, pp. 197-204, 1987
    • (1987) Proceeding of SIGGRAPH , vol.87 , pp. 197-204
    • John, G.1    Torborg2
  • 5
    • 0032023053 scopus 로고    scopus 로고
    • SH4 RISC microprocessor for multimedia
    • March/April
    • Fumio Arakawa, Osamu Nishii and Kunio Uchiyama, "SH4 RISC Microprocessor for Multimedia, " IEEE Micro, Vol. 18, No. 2, pp. 26-34, March/April 1998
    • (1998) IEEE Micro , vol.18 , Issue.2 , pp. 26-34
    • Arakawa, F.1    Nishii, O.2    Uchiyama, K.3
  • 7
    • 0029216689 scopus 로고
    • An area/performance comparison of subtractive and multiplicative divide/square root implementations
    • Jul
    • Peter Soderquist and Miriam Leeser, "An Area/Performance Comparison of subtractive and Multiplicative Divide/Square Root Implementations", In the Proceedings 12∗IEEE Symposium on Computer Arithmetic, pp. 132-139, Jul. 1995
    • (1995) The Proceedings 12 IEEE Symposium on Computer Arithmetic , pp. 132-139
    • Soderquist, P.1    Leeser, M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.