Tiles chamfering and power handling of the MK II HD divertor

Fusion Engineering and Design

Volumn 75-79, Issue SUPPL., 2005, Pages 505-509

  Salavy, J F ^a   Chappuis, P ^b   Lomas, P J ^c   Riccardo, V ^c  

^a CEA SACLAY   (France)

^b IRFM   (France)

^c CULHAM SCIENCE CENTRE   (United Kingdom)

Author keywords

JET Divertor; Power handling; Tile chamfering

Indexed keywords

FINITE ELEMENT METHOD; OPTIMIZATION;

JET DIVERTORS; POWER HANDLING;

FUSION REACTOR DIVERTORS;

EID: 27744598791     PISSN: 09203796     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.fusengdes.2005.06.157     Document Type: Article

References (1)

1. J.-F. Salavy, C. Guerin, A. Peacock, Y. Sauce, P. Chappuis, F. Hurd, Final report on tile design for the Mark IIA-HP divertor in the framework of the JET-EP Project, CEA Report, SEMT/BCCR, August 2002.