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Volumn 26, Issue 11, 2005, Pages 805-807

New substrate passivation method dedicated to HR SOI wafer fabrication with increased substrate resistivity

Author keywords

Coplanar waveguide; Effective resistivity; Interface traps; Microwave losses; Oxide charges; Silicon on insulator (SOI) technology

Indexed keywords

CRYSTALLIZATION; ELECTRIC CONDUCTIVITY; FABRICATION; PASSIVATION; RAPID THERMAL ANNEALING; SILICON WAFERS; SUBSTRATES; SURFACE ROUGHNESS; THERMODYNAMIC STABILITY; WAVEGUIDES;

EID: 27744571537     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2005.857730     Document Type: Article
Times cited : (124)

References (13)
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    • "Effectiveresistivity of fully-processed high resistivity wafers"
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  • 10
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    • M. Hack, J. G. Shaw, P. G. Lecomber, and M. Willums, "Numerical simulations of amorphous and polycrystalline silicon thin-film transistors," Jpn J. Appl. Phys., vol. 29, no. 12, pp. 2360-2362, 1990.
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    • Hack, M.1    Shaw, J.G.2    Lecomber, P.G.3    Willums, M.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.