The transformer characteristic resistance and its application to the performance analysis of silicon integrated transformers

Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium

Volumn , Issue , 2005, Pages 597-600

  Italia, Alessandro ^a   Carrara, Francesco ^a   Ragonese, Egidio ^a   Biondi, Tonio ^b   Scuderi, Angelo ^a   Palmisano, Giuseppe ^a  

^a UNIVERSITY OF CATANIA   (Italy)

^b STMICROELECTRONICS   (Italy)

Author keywords

Integrated transformer; Patterned ground shield; Silicon technology; Substrate losses; Transformer characteristic resistance; Tuned load

Indexed keywords

INTEGRATED TRANSFORMER; PATTERNED GROUND SHIELD; SUBSTRATE LOSSES; TRANSFORMER CHARACTERISTIC RESISTANCE; TUNED LOAD;

ELECTRIC LOADS; OPTIMIZATION; SILICON;

ELECTRIC TRANSFORMERS;

EID: 27644581528     PISSN: 15292517     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RFIC.2005.1489884     Document Type: Conference Paper

References (8)

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