Reducing measurement uncertainty in a DSP-based mixed-signal test environment without increasing test time

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 13, Issue 7, 2005, Pages 852-860

  Taillefer, Chris S ^a,b,d   Roberts, Gordon W ^a,b,c  

^a IEEE   (Canada)

^b MCGILL UNIVERSITY   (Canada)

^c INSTITUTE FOR RESEARCH IN IMMUNOLOGY AND CANCER   (Canada)

^d Gina Cody School of Engineering and Computer Science   (Canada)

Author keywords

Analog digital conversion; Measurement; Mixed analog digital integrated circuits; Testing

Indexed keywords

CLOCK JITTERS; MIXED ANALOG-DIGITAL INTEGRATED CIRCUITS; MIXED-SIGNAL TESTS; SAMPLING SYSTEMS;

ANALOG TO DIGITAL CONVERSION; CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; MEASUREMENTS; SAMPLING; SPURIOUS SIGNAL NOISE; TESTING; TIMING JITTER;

DIGITAL SIGNAL PROCESSING;

EID: 27644578022     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2005.850113     Document Type: Article

References (7)

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