On the optimum 2nd harmonic source and load impedances for the efficiency-linearity trade-off of RF LDMOS power amplifiers

Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium

Volumn , Issue , 2005, Pages 447-450

  Hartskeerl, D M H ^a   Volokhine, I ^a   Spirito, M ^b  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

^b DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

Circuit modeling; Distortion; Microwave FET amplifiers

Indexed keywords

CIRCUIT MODELING; DISTORTION; MICROWAVE FET AMPLIFIER; POWER-ADDED EFFICIENCY (PAE);

CMOS INTEGRATED CIRCUITS; CODE DIVISION MULTIPLE ACCESS; ELECTRIC LOADS; INTEGRATED CIRCUIT LAYOUT; SECOND HARMONIC GENERATION;

POWER AMPLIFIERS;

EID: 27644566083     PISSN: 15292517     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RFIC.2005.1489839     Document Type: Conference Paper

References (10)

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