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Volumn , Issue , 2004, Pages 571-574

Comparison of the hardware architectures and FPGA implementations of stream ciphers

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; COMPUTER PROGRAMMING LANGUAGES; FIELD PROGRAMMABLE GATE ARRAYS; STANDARDS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; CRYPTOGRAPHY;

EID: 27644550957     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (31)

References (12)
  • 1
    • 27644459525 scopus 로고    scopus 로고
    • Overview of IEEE 802.11b security
    • "Overview of IEEE 802.11b Security", Intel Technology Journal Q2, 2000.
    • (2000) Intel Technology Journal Q2
  • 4
    • 3543071325 scopus 로고    scopus 로고
    • Helix: Fast encryption and authentication in a single cryptographic primitive
    • Lund, Sweden, Feb. 24-26
    • N. Ferguson et al., "Helix: Fast Encryption and Authentication in a Single Cryptographic Primitive", in Proc. Fast Software Encryption, Lund, Sweden, Feb. 24-26, 2003.
    • (2003) Proc. Fast Software Encryption
    • Ferguson, N.1
  • 7
    • 0012983374 scopus 로고    scopus 로고
    • Recommendation for block cipher modes of operation. Methods and techniques
    • Technology Administration, U.S. Department of Commerce
    • "Recommendation for Block Cipher Modes of Operation. Methods and Techniques", National Institute of Standards and Technology (NIST), Technology Administration, U.S. Department of Commerce.
    • National Institute of Standards and Technology (NIST)
  • 11
    • 84937060688 scopus 로고    scopus 로고
    • Hardware implementation of the improved WEP and RC4 encryption algorithms for wireless terminals
    • Tampere, Finland, September 5-8
    • Panu Flamalainen et al., "Hardware Implementation of the Improved WEP and RC4 Encryption Algorithms for Wireless Terminals", in European Signal Processing Conference (EUSIPCO), Tampere, Finland, September 5-8, 2000, pp. 2289-2292.
    • (2000) European Signal Processing Conference (EUSIPCO) , pp. 2289-2292
    • Flamalainen, P.1
  • 12
    • 27644560953 scopus 로고    scopus 로고
    • San Jose, California, Virtex-II 2.5V FPGAs
    • Xilinx Inc., San Jose, California, Virtex-II 2.5V FPGAs, 2004.
    • (2004) Xilinx Inc.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.