Iterational retiming: Maximize iteration-level parallelism for nested loops

CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and System Synthesis

Volumn , Issue , 2005, Pages 309-314

  Xue, Chun ^a   Shao, Zili ^a   Liu, Meilin ^a   Sha, Edwin H M ^a  

^a The University of Texas at Dallas   (United States)

Author keywords

Nested Loops; Optimization; Partition; Retiming

Indexed keywords

NESTED LOOPS; PARTITION; RETIMING;

ALGORITHMS; DIGITAL SIGNAL PROCESSING; EMBEDDED SYSTEMS; MATHEMATICAL TRANSFORMATIONS; OPTIMIZATION;

PARALLEL PROCESSING SYSTEMS;

EID: 27644508661     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. A. Aiken and A. Nicolau. Optimal loop parallelization. ACM Conference on Programming Language Design and Implementation, pages 308-317, 1988.
2. A. Aiken and A. Nicolau. Fine-Grain Parallelization and the Wavefront Method. MIT Press, 1990.
3. L.-P. Chao, A. S. LaPaugh, and E. H.-M. Sha. Rotation scheduling: A loop pipelining algorithm. IEEE Trans. on Computer-Aided Design, 16(3):229-239, March 1997.
4. L.-F. Chao and E.-M. Sha. Rate-optimal static scheduling for dsp data-flow programs. IEEE Third Great lakes Symposium on VLSI, pages 80-84, March 1993.
5. L. Lamport. The parallel execution of do loops. Communications of the ACM SIG-PLAN, 17:82-93, FEB. 1991.
6. C. E. Leiserson and J. B. Saxe. Retiming synchronous circuitry. Algorithmica, 6:5-35, 1991.
7. N. Passos and E. Sha. Full parallelism of uniform nested loops by multi-dimensional retiming. Internal conference on Parallel Processing, 2:130-133, Aug. 1994.
8. M. Renfors and Y. Neuvo. The maximum sampling rate of digital filters under hardware speed constraints. IEEE Transactions on Cirtuits and Systems, pages 196-202, March 1981.