메뉴 건너뛰기




Volumn , Issue , 1998, Pages 226-231

A scalable methodology for cost estimation in a transformational high-level design space exploration environment

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN CHARACTERISTICS; ESTIMATION METHODOLOGIES; HIGH LEVEL OF ABSTRACTION; HIGH LEVEL SYNTHESIS; HIGH-LEVEL DESIGN; HIGH-LEVEL ESTIMATION; HIGH-LEVEL TRANSFORMATIONS; TRANSFORMATIONAL DESIGN;

EID: 26444530745     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.1998.655861     Document Type: Conference Paper
Times cited : (5)

References (14)
  • 2
    • 0343417459 scopus 로고
    • Phase 2: Full Rate Speech Transcoding. DIN Norm ETS 300580-2, DIN Deutsches Institut für Normung e.V., Beuth Verlag GmbH, 10772 Berlin
    • European Digital CellularTelecommunications Systems, Phase 2: Full Rate Speech Transcoding. DIN Norm ETS 300580-2, DIN Deutsches Institut für Normung e.V., Beuth Verlag GmbH, 10772 Berlin., 1994.
    • (1994) European Digital CellularTelecommunications Systems
  • 9
    • 2342456329 scopus 로고
    • A model for estimating power dissipation in a class of dsp vlsi chips
    • June
    • S.R. Powell, P.M. Chou. A Model for Estimating Power Dissipation in a Class of DSP VLSI Chips. IEEE Transactions on Circuits and Systems, Vol. 36, No. 6, June 1995, pp. 646-650.
    • (1995) IEEE Transactions on Circuits and Systems , vol.36 , Issue.6 , pp. 646-650
    • Powell, S.R.1    Chou, P.M.2
  • 10
  • 11


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.