X-MatchPRO: A ProASIC-based 200 Mbytes/s full-duplex lossless data compressor

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2147, Issue , 2001, Pages 613-617

  Núñez, José Luis ^a   Feregrino, Claudia ^a   Jones, Simon ^a   Bateman, Stephen ^b  

^a LOUGHBOROUGH UNIVERSITY   (United Kingdom)

^b Bridgewave Communications Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPRESSORS; COMPUTER CIRCUITS; DIGITAL STORAGE; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); NETWORK ARCHITECTURE;

DATA NETWORK; FULL-DUPLEX; LOSSLESS DATA; NON-VOLATILE; ORIGINAL SYSTEMS; REPROGRAMMABLE;

DATA COMPRESSION RATIO;

EID: 26444527136     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-44687-7_65     Document Type: Conference Paper

References (13)

1. M. Nelson, The Data Compression Book., Prentice Hall, 1991.
2. M. Kjelso, M. Gooch, S. Jones,. Design & Performance of a Main Memory Hardware Data Compressor., Proceedings 22nd EuroMicro Conference, pp. 423-430, September 1996, Prague, Czech Republic.
3. J. Nuñez, C. Feregrino, S. Bateman, S. Jones,.The X-MatchLITE FPGA-based Data Compressor., Proceedings 25th EuroMicro Conference, pp126-133, September 1999.
4. José Luis Núñez, Simon Jones,’The X-MatchPRO 100 Mbytes/second FPGA-Based Lossless Data Compressor., proceedings of Design, Automation and Test in Europe, DATE Conference 2000, pp. 139-142, March, 2000.
5. J. L. Bentley, D. D. Sleator, R. E. Tarjan, V. K. Wei,.A Locally Adaptive Data Compression Scheme., Communications of the ACM, Vol. 29, No. 4, pp. 320-330, April 1986.
6. ProASIC. 500K Family., Data sheet, Actel corporation, 955 East Arques Avenue, Sunnyvale, CA, 2000.
7. ALDC1-40S-M., Data sheet, IBM Microelectronics Division, 15080 Route 52, Bldg 504 Hopewell Junction, NY, 1994.
8. AHA3521 40 Mbytes/s ALDC Data Compression Coprocessor IC., Product Brief, Advanced Hardware Architectures Inc, 2635 Hopkins Court, Pullman, WA, 1997.
9. J.M. Cheng and L.M. Duyanovich,.Fast and Highly Reliable IBMLZ1 Compression Chip and Algorithm for Storage.,Hot Chips VII Symposium, August 14-15, pp. 155-165, 1995.
10. AHA3211 20 Mbytes/s DCLZ Data Compression Coprocessor IC., Product Brief, Advanced Hardware Architectures Inc, 2635 Hopkins Court, Pullman, WA, 1997.
11. Primer: Data Compression (DCLZ)., Application Note, Advanced Hardware Architectures Inc, 2635 Hopkins Court, Pullman, WA, 1996.
12. 9600 Data Compression Processor., Data Sheet, Hi/fn Inc, 750 University Avenue, Los Gatos, CA, 1999.
13. How LZS Data Compression Works., Application Note, Hi/fn Inc, 750 University Avenue, Los Gatos, CA, 1996.