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Volumn 4, Issue 5, 2004, Pages 915-919

Scalable interconnection and integration of nanowire devices without registration

Author keywords

[No Author keywords available]

Indexed keywords

SILICON;

EID: 2642552870     PISSN: 15306984     EISSN: None     Source Type: Journal    
DOI: 10.1021/nl049659j     Document Type: Article
Times cited : (328)

References (28)
  • 15
    • 0141605095 scopus 로고    scopus 로고
    • Yang, P. Nature 2003, 425, 243-244.
    • (2003) Nature , vol.425 , pp. 243-244
    • Yang, P.1
  • 18
    • 2642569482 scopus 로고    scopus 로고
    • note
    • 16
  • 19
    • 2642566995 scopus 로고    scopus 로고
    • note
    • Electrode interconnects to the patterned nanowire arrays were prepared by standard photolithography to define a repeating pattern, followed by the thermal deposition of Ni (70 nm). The high-resolution integrated electrode array patterns were defined by electron beam lithography, followed by the thermal deposition of Ni contacts. Electrical transport measurements were made at room temperature with a high-precision semiconductor analyzer (Aglient 4156C, Agilent Technologies, Palo Alto, CA) and a probe station (Desert Cryogenics, Tucson, AZ).


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.