Low-cost wafer bumping

IBM Journal of Research and Development

Volumn 49, Issue 4-5, 2005, Pages 621-639

  Gruber, Peter A ^a   Bélanger, Luc ^b   Brouillette, Guy P ^b   Danovitch, David H ^b   Landreville, Jean Luc ^b   Naugle, David T ^c   Oberson, Valerie A ^b   Shih, Da Yuan ^a   Tessler, Chris L ^c   Turgeon, Michel R ^b  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b IBM CANADA LTD   (Canada)

^c IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP SCALE PACKAGES; EUTECTICS; FLIP CHIP DEVICES; INJECTION MOLDING; PHOTOLITHOGRAPHY; RELIABILITY; SOLDERING ALLOYS; TIN ALLOYS;

INTERCONNECT TECHNOLOGY; LEAD-FREE ALLOY; LOW-COST WAFER BUMPING;

ELECTRONICS PACKAGING;

EID: 25844510182     PISSN: 00188646     EISSN: None     Source Type: Journal    
DOI: 10.1147/rd.494.0621     Document Type: Review

References (18)

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