Dynamic voltage scaling techniques for power efficient video decoding

Journal of Systems Architecture

Volumn 51, Issue 10-11, 2005, Pages 633-652

  Lee, Ben ^a,e   Nurvitadhi, Eriko ^b   Dixit, Reshma ^a   Yu, Chansu ^c   Kim, Myungchul ^d  

^a Oregon State University   (United States)

^b CARNEGIE MELLON UNIVERSITY   (United States)

^c Cleveland State University   (United States)

^d Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

^e OREGON STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC VOLTAGE SCALING (DVS); FRAME-DATA COMPUTATION AWARE (FDCA) TECHNIQUE; REAL-TIME VIDEO; VIDEO DECODING;

CODES (SYMBOLS); COMPUTATION THEORY; COMPUTER SIMULATION; ELECTRIC POTENTIAL; ENERGY UTILIZATION; PROGRAM PROCESSORS;

IMAGE CODING;

EID: 25644442451     PISSN: 13837621     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sysarc.2005.01.002     Document Type: Article

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