Equivalence checking of arithmetic circuits on the arithmetic bit level

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 23, Issue 5, 2004, Pages 586-597

  Stoffel, Dominik ^a   Kunz, Wolfgang ^a  

^a Rheinland Pfälzische Technische Universität Kaiserslautern Landau   (Germany)

Author keywords

Arithmetic bit level; Arithmetic circuit; Datapath verification; Equivalence checking; Formal hardware verification; Multiplier

Indexed keywords

BOOLEAN ALGEBRA; COMBINATORIAL CIRCUITS; DECISION THEORY; EQUIVALENT CIRCUITS; OPTIMAL CONTROL SYSTEMS;

ARITHMETIC BIT LEVEL; DATAPATH VERIFICATION; FORMAL HARDWARE VERIFICATION; OPERAND BITS;

DIGITAL ARITHMETIC;

EID: 2542429377     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2004.826548     Document Type: Article

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