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Volumn 3, Issue , 2001, Pages 1521-1524

Low-power low-voltage library cells and memories

Author keywords

[No Author keywords available]

Indexed keywords

BITLINES; CROSSTALK EFFECT; DEEP SUB-MICRON TECHNOLOGY; LIBRARY CELLS; LOW POWER; LOW SUPPLY VOLTAGES; NEW APPROACHES; SIGNAL INPUT; SRAM MEMORIES; STANDARD CELL; SYSTEMS ON CHIPS; WIRE DELAYS;

EID: 25144469898     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (9)

References (14)
  • 1
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    • Double-latch clocking scheme for low-power I.P. cores
    • Goettingen, Germany, September 13-15
    • C. Arm, JM. Masgonty, C. Piguet, "Double-Latch Clocking Scheme for Low-Power I.P. Cores", PATMOS 2000, Goettingen, Germany, September 13-15, 2000.
    • (2000) PATMOS 2000
    • Arm, C.1    Masgonty, J.M.2    Piguet, C.3
  • 2
    • 0343323500 scopus 로고    scopus 로고
    • Low power design in deep submicron electronics
    • Series E: Applied Sciences - Vol. 337, Editors W. Nebel, J. Mermet, Kluwer Academic Publishers
    • "Low Power Design in Deep Submicron Electronics", NATO ASI Series, Series E: Applied Sciences - Vol. 337, Editors W. Nebel, J. Mermet, Kluwer Academic Publishers, 1997.
    • (1997) NATO ASI Series
  • 3
    • 77956864745 scopus 로고    scopus 로고
    • Signal-transition graphs-based design of speed-independent CMOS circuits
    • September 21-24, Den Haag, The Netherlands
    • C. Piguet, J. Zahnd, "Signal-Transition Graphs-based Design of Speed-Independent CMOS Circuits", ESSCIRC'98, September 21-24, 1998, Den Haag, The Netherlands, pp. 432-435.
    • (1998) ESSCIRC'98 , pp. 432-435
    • Piguet, C.1    Zahnd, J.2
  • 4
    • 77956803548 scopus 로고    scopus 로고
    • Robustness of asynchronous sequential standard cells in a synchronous environment
    • "Asynchronous Interfaces", Delft, The Netherlands, July 19-20
    • C Piguet, "Robustness of Asynchronous Sequential Standard Cells in a Synchronous Environment", AINT'2000, "Asynchronous Interfaces", Delft, The Netherlands, July 19-20, 2000.
    • (2000) AINT'2000
    • Piguet, C.1
  • 5
    • 0032273279 scopus 로고    scopus 로고
    • Design of low-power libraries
    • Invited Paper at, September 7-9, Lisbon, Portugal, Vol. 2 of 3, pp. 2.175-2.180
    • C. Piguet, "Design of Low-Power Libraries", Invited Paper at ICECS'98, September 7-9, 1998, Lisbon, Portugal, Vol. 2 of 3, pp. 2.175-2.180.
    • (1998) ICECS'98
    • Piguet, C.1
  • 6
    • 77956829125 scopus 로고    scopus 로고
    • http://notes.sematech.org/ntrs/rdmpmem.nsf.
  • 8
    • 0028755812 scopus 로고
    • Automatic adjustment of threshold & supply voltage minimum power consumption in CMOS digital circuits
    • San Diego, October 10-12
    • V. von Kaenel et al. "Automatic Adjustment of Threshold & Supply Voltage Minimum Power Consumption in CMOS Digital Circuits", 1994 IEEE Symposium on Low Power Electronics, San Diego, October 10-12, 1994, pp. 78-79.
    • (1994) 1994 IEEE Symposium on Low Power Electronics , pp. 78-79
    • Von Kaenel, V.1
  • 9
    • 0031192292 scopus 로고    scopus 로고
    • Low-power design of 8-bit embedded CoolRISC microcontroller cores
    • July
    • C Piguet et al. "Low-Power Design of 8-bit Embedded CoolRISC Microcontroller Cores", IEEE JSSC, Vol. 32, No 7, July 1997, pp. 1067-1078.
    • (1997) IEEE JSSC , vol.32 , Issue.7 , pp. 1067-1078
    • Piguet, C.1
  • 10
    • 0029288557 scopus 로고
    • Trends in low-power RAM circuit technologies
    • April
    • K. Itoh at al. "Trends in Low-Power RAM Circuit Technologies", Proc. IEEE, Vol. 83, No 4, April 1995, pp. 524-543.
    • (1995) Proc. IEEE , vol.83 , Issue.4 , pp. 524-543
    • Itoh, K.1
  • 11
    • 0033362615 scopus 로고    scopus 로고
    • A shared-bitline SRAM cell architecture for 1-V ultra low-power word-bit configurable macrocells
    • San Diego, USA
    • H. Morimura et al. "A Shared-Bitline SRAM Cell Architecture for 1-V Ultra Low-Power Word-Bit Configurable Macrocells", Proc. ISLPED 1999, San Diego, USA.
    • Proc. ISLPED 1999
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  • 12
    • 77956857194 scopus 로고    scopus 로고
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  • 13
    • 16244399669 scopus 로고    scopus 로고
    • A low-power SRAM with resonantly powered data, address, word and bit lines
    • September 19-21, Stockholm
    • N. Tzartzanis et al. "A Low-Power SRAM with Resonantly Powered Data, Address, Word and Bit Lines", Proc. ESSCIRC2000, September 19-21, 2000, Stockholm, pp. 336-339.
    • (2000) Proc. ESSCIRC2000 , pp. 336-339
    • Tzartzanis, N.1
  • 14
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.