Fast modular multiplication using Booth recoding based on signed-digit number arithmetic

IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Volumn 2, Issue , 2002, Pages 31-36

  Wei, S ^a   Chen, S ^a   Shimizu, K ^a  

^a GUNMA UNIVERSITY   (Japan)

Author keywords

Adders; Circuits; Computer science; Digital arithmetic; Digital signal processing; Hardware design languages; Pipelines; Public key cryptography; Registers; Signal processing algorithms

Indexed keywords

ADDERS; ALGORITHMS; COMPUTER HARDWARE; COMPUTER SCIENCE; DIGITAL ARITHMETIC; DIGITAL SIGNAL PROCESSING; MULTIPLYING CIRCUITS; NETWORKS (CIRCUITS); NUMBERING SYSTEMS; PIPELINE PROCESSING SYSTEMS; PIPELINES; PUBLIC KEY CRYPTOGRAPHY;

CARRY PROPAGATION; HARDWARE DESIGN LANGUAGE; MODULAR MULTIPLICATION; MODULAR MULTIPLIERS; PIPELINE ARCHITECTURE; REGISTERS; SIGNAL PROCESSING ALGORITHMS; SIGNED DIGIT NUMBERS;

SIGNAL PROCESSING;

EID: 24944497509     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APCCAS.2002.1115104     Document Type: Conference Paper

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