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Volumn 5753, Issue II, 2005, Pages 636-643

ARC and gap fill material with high etch rate for advanced Dual Damascene process

Author keywords

Gap fill material; High etch rate; Iso dense fill bias; Via first Dual Damascene (DD) process

Indexed keywords

COATINGS; ELECTRIC INSULATION; ELECTRIC WIRING; ETCHING; OXYGEN; PERMITTIVITY; POROUS MATERIALS; SURFACE TOPOGRAPHY;

EID: 24644519815     PISSN: 16057422     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.599249     Document Type: Conference Paper
Times cited : (14)

References (9)
  • 6
    • 24644505508 scopus 로고    scopus 로고
    • Fill material for Dual Damascene process, U.S. Patent 6,391,472, May 21
    • Lamb III et al; Fill material for Dual Damascene process, U.S. Patent 6,391,472, May 21, 2002.
    • (2002)
    • Lamb III1
  • 7
    • 2342577104 scopus 로고    scopus 로고
    • Optical lithography
    • edited by Yoshio Nishi and Robert Doering, Marcel Dekker, Inc., New York
    • Gene E. Fuller, "Optical Lithography" in Handbook of Semiconductor Manufacturing Technology, edited by Yoshio Nishi and Robert Doering, 463, Marcel Dekker, Inc., New York, 2000.
    • (2000) Handbook of Semiconductor Manufacturing Technology , pp. 463
    • Fuller, G.E.1
  • 8
    • 24644508131 scopus 로고    scopus 로고
    • Plug filling for Dual Damascene process, US Patent 6,488,509, Dec. 3
    • Ho et al, Plug filling for Dual Damascene process, US Patent 6,488,509, Dec. 3 2002.
    • (2002)
    • Ho1
  • 9
    • 24644446661 scopus 로고    scopus 로고
    • Method of forming via first Dual Damascene Interconnect structure; US Patent 6,458,705, Oct. 1
    • Hung et al, Method of forming via first Dual Damascene Interconnect structure; US Patent 6,458,705, Oct. 1 2002.
    • (2002)
    • Hung1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.