메뉴 건너뛰기




Volumn , Issue , 2004, Pages 113-118

An efficient reuse-based approach to implement the 3GPP KASUMI block cipher

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER HARDWARE; FIELD PROGRAMMABLE GATE ARRAYS; SECURITY OF DATA; TELECOMMUNICATION NETWORKS; THROUGHPUT;

EID: 24644468993     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (7)

References (7)
  • 1
    • 14244268187 scopus 로고    scopus 로고
    • 3rd Generation Partnership Program. 3GPP Home Page. http://www.3gpp.org
    • 3GPP Home Page
  • 2
    • 24644475454 scopus 로고    scopus 로고
    • Document 2: KASUMI specification
    • Release 5. Version 5.0.0
    • 3rd Generation Partnership Program. Document 2: KASUMI Specification. Technical Specification 35.202. Release 5. Version 5.0.0.
    • Technical Specification 35.202
  • 7
    • 84945295725 scopus 로고    scopus 로고
    • Small and high-speed hardware architectures for the 3GPP standard cipher KASUMI
    • Sao Paulo, Brazil
    • A. Satoh and S. Morioka, "Small and High-Speed Hardware Architectures for the 3GPP Standard Cipher KASUMI", in Proc. of the 5th International Conference on Information Security, Sao Paulo, Brazil, 2002, pp. 48-62.
    • (2002) Proc. of the 5th International Conference on Information Security , pp. 48-62
    • Satoh, A.1    Morioka, S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.