A 2GHz CMOS variable-gain amplifier with 50dB linear-in-magnitude controlled gain range for 10GBase-LX4 Ethernet

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 47, Issue , 2004, Pages

  Wu, Chia Hsin ^a   Liu, Chang Shun ^a   Liu, Shen Iuan ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP-ON-BOARD ASSEMBLIES; ETHERNET SYSTEM; OPTICAL RECEIVER CIRCUITS;

CAPACITORS; CMOS INTEGRATED CIRCUITS; COMPUTER NETWORKS; GAIN CONTROL; INDUCTANCE; TRANSCONDUCTANCE; TRANSISTORS;

AMPLIFIERS (ELECTRONIC);

EID: 2442715515     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. IEEE Std. 802.3af-2003.
2. E. Säckinger, and W. C. Fischer, "A 3-GHz 32-dB CMOS Limiting Amplifier for SONET OC-48 Receiver," IEEE J. Solid-State Circuits, vol. 35, no. 12, pp. 1884-1888, Dec. 2000.
3. B. Gilbert, "A Precise Four-Quadrant Multiplier with Subnanosecond Response," IEEE J. Solid-State Circuits, vol. SC-3, pp. 365-373, Dec. 1968.
4. C.-C. Tang, C.-H. Wu, and S.-I. Liu, "Miniature 3D Inductors in Standard CMOS Process," IEEE J. Solid-State Circuits, vol. 37, pp. 471-480, April 2002.