110Gb/s multiplexing and demultiplexing ICs

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 47, Issue , 2003, Pages 182-183+518

  Suzuki, Yasuyuki ^a   Amamiya, Yasushi ^a   Yamazaki, Zin ^a   Wada, Shigeki ^a   Uchida, Hiroaki ^a   Kurioka, Chiharu ^a   Tanaka, Shinichi ^a   Hida, Hikaru ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DEMULTIPLEXING; ELECTRIC IMPEDANCE; ELECTRIC LOADS; FLIP FLOP CIRCUITS; HETEROJUNCTION BIPOLAR TRANSISTORS; MICROSTRIP LINES; PRODUCT DESIGN; TRANSISTORS;

IMPEDANCE MATCHING; SIGNAL QUALITY;

INTEGRATED CIRCUITS;

EID: 2442703020     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)