Cosmic-ray immune latch circuit for 90nm technology and beyond

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 47, Issue , 2003, Pages 408-409+642

  Arima, Yukio ^a,b   Yamashita, Takahiro ^a   Komatsu, Yoshihide ^a   Fujimoto, Tetsuya ^a   Ishibashi, Koichiro ^a  

^a STARC   (Japan)

^b PANASONIC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BIT ERROR RATE; CAPACITANCE; COSMIC RAYS; ELECTRODES; ERROR CORRECTION; FAULT TOLERANT COMPUTER SYSTEMS; FORMAL LOGIC; FUNCTIONS; IRRADIATION; MICROPROCESSOR CHIPS;

ERROR RECOVERY; IMMUNE LATCH CIRCUITS; LATCH CIRCUITS; SOFT ERROR RATES (SER);

FLIP FLOP CIRCUITS;

EID: 2442685555     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)