A 128f s multi-bit ΣΔ CMOS audio DAC with real-time DEM and 115dB SFDR

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 47, Issue , 2004, Pages

  Van Tuijl, Ed ^a   Van Den Homberg, John ^a   Reefman, Derk ^a   Bastiaansen, Corné ^a   Van Der Dussen, Leon ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

DATA WEIGHED AVERAGING (DWA); DYNAMIC ELEMENT MATCHING (DEM); SWITCHED CAPACITORS; TRANSITION PATTERNS;

ALGORITHMS; BINARY CODES; CAPACITORS; CMOS INTEGRATED CIRCUITS; DIGITAL TO ANALOG CONVERSION; JITTER; MICROPROCESSOR CHIPS; SIGNAL PROCESSING;

ELECTRIC CONVERTERS;

EID: 2442667959     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. R. Adams et al., "A 113dB SNB Oversampling Dac with Segmented Noise- Shaped Scrambling," ISSCC Dig. Tech. Papers, pp. 62-63, Feb. 1998.
2. I. Fujimori et al., "A Multi-Bit ΣΔ Audio DAC with 129dB Dynamic Range," ISSCC Dig. Tech. Papers, pp. 152-153, Feb. 1999.
3. R. Henderson et al., "Dynamic Element Matching Technique with Arbitrary Noise Shaping Function," Proc. IEEE Int. Symp. Circuits Syst., May 1996.
4. X. Gong et al., "A 120dB Multi-bit SC Audio DAC with Second-Order Noise-Shaping," ISSCC Dig. Tech. Papers, pp. 344-345, Feb. 2000.
5. M. Johansen et al., "A Review and comparison of Digital PWM Methods for Digital Pulse Modulation Amplifier (PMA) Systems," 107th AES Convention, Sept. 1999.