A 0.18μm 3.0V 64Mb non-volatile phase-transition random-access memory (PRAM)

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 47, Issue , 2004, Pages

  Cho, Woo Yeong ^a   Cho, Beak Hyung ^a   Choi, Byung Gil ^a   Oh, Hyung Rok ^a   Kang, Sang Beom ^a   Kim, Ki Sung ^a   Kim, Kyung Hee ^a   Kim, Du Eung ^a   Kwak, Choong Keun ^a   Byun, Hyun Geun ^a   Hwang, Young Nam ^a   Ahn, Su Jin ^a   Jung, Gi Tae ^a   Jung, Hong Sik ^a   Kim, Kinam ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

BIAS CURRENT; PROCESS VARIATIONS; SENSE AMPLIFIERS (SA);

AMPLIFIERS (ELECTRONIC); CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; ELECTRIC CONDUCTIVITY; ELECTRIC POTENTIAL; GERMANIUM ALLOYS; INTERFACES (COMPUTER); PHASE TRANSITIONS;

RANDOM ACCESS STORAGE;

EID: 2442666411     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. M. Gill, T Lowrey and J. Part, "Ovonic Unified Memory - A High-Performance Nonvolatile Memory Technology for Stand Alone and Embedded Applications," ISSCC Dig. Tech. Papers, pp. 202-203, Feb. 2002.
2. Y. N. Hwang et al., Symp. VLSI Circuits Digest, pp. 173, Jun. 2003.