A 12b 80MS/s pipelined ADC with bootstrapped digital calibraton

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 47, Issue , 2003, Pages

  Grace, Carl R ^b   Hurst, Paul J ^a   Lewis, Stephen H ^a  

^a University of California Davis   (United States)

^b Conexant Systems ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOOTSTRAPPED DIGITAL CALIBRATION; DIGITAL CALIBRATION ALGORITHMS; MODEL PARAMETERS; SIGNAL DEPENDENT GAIN ERRORS;

ALGORITHMS; CMOS INTEGRATED CIRCUITS; ELECTRIC CONVERTERS; ELECTRIC POTENTIAL; ERROR ANALYSIS; MATHEMATICAL MODELS; POWER AMPLIFIERS;

ANALOG TO DIGITAL CONVERSION;

EID: 2442637789     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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