Smart move: A placement-aware retiming and replication method for field programmable gate arrays

IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings

Volumn 1, Issue , 2003, Pages 67-70

  Suaris, Peter ^a   Wang, Dongsheng ^a   Chou, Nan Chi ^a  

^a MENTOR GRAPHICS CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUDGET CONTROL; DELAY CIRCUITS; LOGIC GATES;

CIRCUIT FUNCTIONALITY; CRITICAL PATH DELAYS; IN-FIELD; INCREMENTAL PLACEMENT; MAXIMUM FREQUENCY; PATH DELAY; REPLICATION METHOD; REPLICATION TECHNIQUES;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 2442576223     PISSN: 1523553X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICASIC.2003.1277492     Document Type: Conference Paper

References (7)

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