Performance of evaporated and plated bumps on organic substrates

Proceedings of the IEEE/CPMT International Electronics Manufacturing Technology (IEMT) Symposium

Volumn , Issue , 1998, Pages 1-7

  Mistry, A ^a   Czarnowski, J ^a   Beddingfield, C ^a   Tan, Q ^a   Guajardo, J ^a   Rhyner, K ^a   Kleffner, J ^a   Scanlon, T ^a   Lozano, J ^a   Wontor, D ^a   Scott, K ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONICS PACKAGING; EUTECTICS; INDUSTRIAL ELECTRONICS; TENSILE STRENGTH;

ELECTROLESS; MECHANICAL INTEGRITY; ORGANIC SUBSTRATE; PERIMETER TO AREAS; SILICON EFFICIENCY; SIZE AND SHAPE; SUBSTRATE UTILIZATION; UNDER BUMP METALLIZATION;

SUBSTRATES;

EID: 2442550975     PISSN: 10898190     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEMT.1998.730929     Document Type: Conference Paper

References (3)

1. S. E. Greer, "An Extended Eutectic Solder Bump for FCOB", ECTC 1996 Proceedings.
2. Jay Liu, Motorola AISL, private communication
3. Addi Mistry, Aubrey Sparkman, Leo M. Higgins HI, Craig Beddingfield, "E-3 Solder Bump Integrity and Joinability", SMI, September 1997, pp. 309-13.