Buried solder bump connections for high-density capacitive coupling

IEEE Topical Meeting on Electrical Performance of Electronic Packaging

Volumn 2002-January, Issue , 2002, Pages 205-208

  Mick, Stephen ^a   Luo, Lei ^a   Wilson, John ^a   Franzon, Paul ^a  

^a North Carolina State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COUPLED CIRCUITS; ELECTRONICS PACKAGING; INTEGRATED CIRCUIT INTERCONNECTS; LOW POWER ELECTRONICS;

AC-COUPLED INTERCONNECTS; CAPACITIVE COUPLINGS; COMMUNICATION DATA; DATA RATES; INTERCONNECT ARRAYS; LOW-POWER CONSUMPTION; MULTI-GIGABITS; SOLDER BUMP;

SOLDERING;

EID: 2442536556     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPEP.2002.1057916     Document Type: Conference Paper

References (2)

1. T. Knight, "Capacitive Chip to Chip Interconnections", Polychip Inc and M.I.T. Artificial Intelligence Laboratory, ca 1990.
2. S. Mick, J. Wilson, and P. Franzon, "4Gbps High-Density AC Coupled Interconnection", Proceedings of the IEEE Custom Integrated Circuits Conference, 2002, pp. 133-140.