Performance modeling for all-optical photonic switches based on the vertical stacking of banyan network structures

IEEE Journal on Selected Areas in Communications

Volumn 23, Issue 8, 2005, Pages 1620-1630

  Jiang, Xiaohong ^a,b   Ho, Pin Han ^c   Horiguchi, Susumu ^b  

^a JAPAN ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY   (Japan)

^b TOHOKU UNIVERSITY   (Japan)

^c UNIVERSITY OF WATERLOO   (Canada)

Author keywords

Banyan networks; Blocking probability; Optical switches; Random routing; Vertical stacking

Indexed keywords

COMPUTER SIMULATION; MATHEMATICAL MODELS; OPTICAL COMMUNICATION; PROBABILITY; RANDOM PROCESSES;

BANYAN NETWORKS; BLOCKING PROBABILITY; RANDOM ROUTING; VERTICAL STACKING;

OPTICAL SWITCHES;

EID: 24344490400     PISSN: 07338716     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSAC.2005.851754     Document Type: Article

References (18)

1. H. S. Hinton, An Introduction to Photonic Switching Fabrics. New York: Plenum, 1993.
2. R. Ramaswami and K. N. Sivarajan, Optical Networks: A Practical Perspective. San Mateo, CA: Morgan Kaufmann, 2002.
3. V. R. Chinni, T. C. Huang, P. K. A. Wai, C. R. Menyuk, and G. J. Simonis, "Crosstalk in a lossy directional coupler switch," J. Lightw. Technol., vol. 13, pp. 1530-1535, Jul. 1995.
4. G. R. Goke and G. J. Lipovski, "Banyan networks for partitioning multiprocessor systems," in Proc. 1st Annu. Symp. Comput. Arch, 1973, pp. 21-28.
5. C. P. Kruskal and M. Snir, "The performance of multistage interconnection networks for multiprocessors," IEEE Trans. Commun., vol. COM-32, pp. 1091-1098, Dec. 1983.
6. F. L. Thomson, Introduction to Parallel Algorithms and Architectures: Arrays, Trees, Hypercubes. San Mateo, CA: Morgan Kaufmann, 1992.
7. J. H. Patel, "Performance of processor-memory interconnections for multiprocessors," IEEE Trans. Comput., vol. C-30, pp. 771-780, Oct. 1981.
8. 2 N networks and their applications in high-speed electronic and photonic switching systems," IEEE Trans. Commun., vol. 38, pp. 1740-1749, Oct. 1990.
9. G. Maier and A. Pattavina, "Design of photonic rearrangeable networks with zero first-order switching-element-crosstalk," IEEE Trans. Commun., vol. 49, pp. 1268-1279, Jul. 2001.
10. M. Vaez and C.-T. Lea, "Strictly nonblocking directional-coupler- based switching networks under crosstalk constraint," IEEE Trans. Commun., vol. 48, pp. 316-323, Feb. 2000.
11. M. M. Vaez and C.-T. Lea, "Wide-sense nonblocking Banyan-type switching systems based on directional couplers," IEEE J. Select. Areas Commun., vol. 16, pp. 1327-1332, Sep. 1998.
12. T.-S. Wong and C.-T. Lea, "Crosstalk reduction through wavelength assignment in WDM photonic switching networks," IEEE Trans. Commun., vol. 49, no. 7, pp. 1280-1287, Jul. 2001.
13. C. Y. Lee, "Analysis of switching networks," Bell Syst. Tech. J., vol. 34, no. 6, pp. 1287-1315, Nov. 1955.
14. C. Jacobaeus, "A study on congestion in link systems," Ericsson Technics, vol. 51, no. 3, 1950.
15. C. Clos, "A study of nonblocking switching networks," Bell Syst. Tech. J., vol. 32, pp. 406-424, 1953.
16. D. M. Dias and J. R. Jump, "Analysis and simulation of buffered delta networks," IEEE Trans. Comput., vol. 30, pp. 271-282, Apr. 1981.
17. A. Merchant, "Analytical models for the performance of Banyan networks," Ph.D. dissertation, Comput. Sci. Dept., Stanford Univ., Stanford, CA, 1991.
18. X. Jiang, H. Shen, M. M. R. Khandker, and S. Horiguchi, "Blocking behaviors of crosstalk-free optical Banyan networks on vertical stacking," IEEE/ACM Trans. Netw., vol. 11, pp. 982-993, Dec. 2003.