-
1
-
-
0027592645
-
A fuzzy inference engine in nonlinear analog mode and its applications to a fuzzy logic control
-
May
-
T. Yamakawa, “A fuzzy inference engine in nonlinear analog mode and its applications to a fuzzy logic control,” IEEE Trans. Neural Netw., vol. 4, no. 3, pp. 496–522, May 1993.
-
(1993)
IEEE Trans. Neural Netw.
, vol.4
, Issue.3
, pp. 496-522
-
-
Yamakawa, T.1
-
2
-
-
0001031001
-
Winner-take-all of O(n) complexity
-
D. S. Touretzky, Ed: Morgan Kaufmann
-
J. Lazzaro, S. Lyckenbush, M. A. Malhowad, and C. Mead, “Winner-take-all of O(n) complexity,” in Advances in Neural Signal Processing Systems, D. S. Touretzky, Ed: Morgan Kaufmann, 1989, pp. 703–711.
-
(1989)
Advances in Neural Signal Processing Systems
, pp. 703-711
-
-
Lazzaro, J.1
Lyckenbush, S.2
Malhowad, M.A.3
Mead, C.4
-
3
-
-
0032625438
-
Automatic synthesis of analog and mixed-signal fuzzy controllers with emphasis in power consumption
-
Orlando, FL
-
R. G. Carvajal, A. Torralba, R. Millan, and L. G. Franquelo, “Automatic synthesis of analog and mixed-signal fuzzy controllers with emphasis in power consumption,” in Proc. IEEE Int. Symp. Circuits and Systems, vol. 5, Orlando, FL, 1999, pp. 571–574.
-
(1999)
Proc. IEEE Int. Symp. Circuits and Systems
, vol.5
, pp. 571-574
-
-
Carvajal, R.G.1
Torralba, A.2
Millan, R.3
Franquelo, L.G.4
-
4
-
-
0028602476
-
Array based fuzzy inference mechanism implemented with current mode CMOS circuits
-
London, U.K. Jun.
-
B. Liu and C. Huang, “Array based fuzzy inference mechanism implemented with current mode CMOS circuits,” in Proc. Int. Conf. Circuits and Systems, vol. 5, London, U.K., Jun. 1994, pp. 537–540.
-
(1994)
Proc. Int. Conf. Circuits and Systems
, vol.5
, pp. 537-540
-
-
Liu, B.1
Huang, C.2
-
5
-
-
0031077298
-
Implementation of CMOS fuzzy controllers as mixed-signal integrated circuits
-
Feb.
-
I. Baturone, S. Sanchez-Solano, A. Barriga, and J. L. Huertas, “Implementation of CMOS fuzzy controllers as mixed-signal integrated circuits,” IEEE Trans. Fuzzy Syst., vol. 5, no. 2, pp. 1–19, Feb. 1997.
-
(1997)
IEEE Trans. Fuzzy Syst.
, vol.5
, Issue.2
, pp. 1-19
-
-
Baturone, I.1
Sanchez-Solano, S.2
Barriga, A.3
Huertas, J.L.4
-
6
-
-
0031674052
-
Rail-to-rail multiple-input min/max circuit
-
Jan.
-
I. Opris, “Rail-to-rail multiple-input min/max circuit,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 45, no. 1, pp. 137–140, Jan. 1998.
-
(1998)
IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process.
, vol.45
, Issue.1
, pp. 137-140
-
-
Opris, I.1
-
7
-
-
0030654245
-
Analog maximum, median and minimum circuit
-
Hong Kong, Jun.
-
S. Liu, P. Chen, C. Chen, and J. Hwu, “Analog maximum, median and minimum circuit,” in Proc. IEEE Int. Symp. Circuits and Systems, Hong Kong, Jun. 1997, pp. 257–260.
-
(1997)
Proc. IEEE Int. Symp. Circuits and Systems
, pp. 257-260
-
-
Liu, S.1
Chen, P.2
Chen, C.3
Hwu, J.4
-
9
-
-
0031996752
-
A high-precision current-mode WTA-MAX circuit with multichip capability
-
Feb.
-
T. Serrano-Gotarredona and B. Linares-Barranco, “A high-precision current-mode WTA-MAX circuit with multichip capability,” IEEE J. Solid-State Circuits, vol. 33, no. 2, pp. 280–286, Feb. 1998.
-
(1998)
IEEE J. Solid-State Circuits
, vol.33
, Issue.2
, pp. 280-286
-
-
Serrano-Gotarredona, T.1
Linares-Barranco, B.2
-
10
-
-
0029247689
-
A modular current-mode high-precision winner-take-all circuit
-
Feb.
-
T. Serrano and B. Linares-Barranco, “A modular current-mode high-precision winner-take-all circuit,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 42, no. 2, pp. 132–134, Feb. 1995.
-
(1995)
IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process.
, vol.42
, Issue.2
, pp. 132-134
-
-
Serrano, T.1
Linares-Barranco, B.2
-
11
-
-
0036297123
-
The flipped voltage follower: A useful cell for low-voltage low-power circuit design
-
Scottsdale, AZ, May 26–29
-
J. Ramirez-Angulo, R. G. Carvajal, A. Torralba, J. Galan, and J. Tombs, “The flipped voltage follower: A useful cell for low-voltage low-power circuit design,” in Proc. IEEE ISCAS, vol. 3, Scottsdale, AZ, May 26–29, 2002, pp. 615–618.
-
(2002)
Proc. IEEE ISCAS
, vol.3
, pp. 615-618
-
-
Ramirez-Angulo, J.1
Carvajal, R.G.2
Torralba, A.3
Galan, J.4
Tombs, J.5
-
12
-
-
4344574036
-
Winner-take-all class AB input stage: A novel concept for low-voltage power-efficient class AB amplifiers
-
May
-
J. Ramirez-Angulo, S. Baswa, A. Lopez-Martin, and R. G. Carvajal, “Winner-take-all class AB input stage: A novel concept for low-voltage power-efficient class AB amplifiers,” in Proc. Int. Symp. Circuits and Systems, vol. 1, May 2004, pp. 1028–1031.
-
(2004)
Proc. Int. Symp. Circuits and Systems
, vol.1
, pp. 1028-1031
-
-
Ramirez-Angulo, J.1
Baswa, S.2
Lopez-Martin, A.3
Carvajal, R.G.4
-
13
-
-
11144358379
-
Low supply voltage high-performance CMOS current mirror with low input and output voltage requirements
-
Mar.
-
J. Ramirez-Angulo, R. G. Carvajal, and A. Torralba, “Low supply voltage high-performance CMOS current mirror with low input and output voltage requirements,” IEEE Trans. Circuits Syst. II, Express Briefs, vol. 51, no. 3, pp. 124–129, Mar. 2004.
-
(2004)
IEEE Trans. Circuits Syst. II, Express Briefs
, vol.51
, Issue.3
, pp. 124-129
-
-
Ramirez-Angulo, J.1
Carvajal, R.G.2
Torralba, A.3
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