Hierarchical communication model for interface synthesis in system-on-chip design

Jisuanji Fuzhu Sheji Yu Tuxingxue Xuebao/Journal of Computer-Aided Design and Computer Graphics

Volumn 17, Issue 8, 2005, Pages 1803-1808

  Wang, Haili ^a   Bian, Jinian ^a   Xiong, Zhihui ^b   Li, Sikun ^b   Chen, Jihua ^b  

^a TSINGHUA UNIVERSITY   (China)

^b NATIONAL UNIVERSITY OF DEFENSE TECHNOLOGY   (China)

Author keywords

Intellectual property core; Interface synthesis; System level design hierarchical communication model

Indexed keywords

EID: 23944486623     PISSN: 10039775     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (14)