A broad-band lumped element analytic model incorporating skin effect and substrate loss for inductors and inductor like components for silicon technology performance assessment and RFIC design

IEEE Transactions on Electron Devices

Volumn 52, Issue 7, 2005, Pages 1429-1441

  Rotella, Francis ^a,b   Bhattacharya, Bijan K ^a   Blaschke, Volker ^c   Matloubian, Mishel ^d   Brotman, Andy ^e,f   Cheng, Yuhua ^a,g   Divecha, Rajesh ^d   Howard, David ^c   Lampaert, Koen ^d   Miliozzi, Paolo ^a   Racanelli, Marco ^c   Singh, Paramjit ^d,f   Zampardi, Pete J ^a  

^a SKYWORKS SOLUTIONS INC   (United States)

^b FUJITSU LABORATORIES OF AMERICA   (United States)

^c Jazz Semiconductor   (United States)

^d Mindspeed Technologies   (United States)

^e Rockwell Semiconductor Systems   (United States)

^f QUALCOMM INC   (United States)

^g Siliconlinx Inc   (United States)

Author keywords

Baluns; Circuit optimization; Circuit simulation; Inductors; Integrated circuit design; Integrated circuit modeling; Spice

Indexed keywords

COMPUTER SIMULATION; ELECTRIC INDUCTORS; LUMPED PARAMETER NETWORKS; OPTIMIZATION; SEMICONDUCTING SILICON; SKIN EFFECT; SUBSTRATES;

BALUNS; CIRCUIT OPTIMIZATION; CIRCUIT SIMULATION; INTEGRATED CIRCUIT DESIGN; INTEGRATED CIRCUIT MODELING;

INTEGRATED CIRCUIT LAYOUT;

EID: 23944482250     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2005.850635     Document Type: Article

References (31)

1. J. Gil and H. Shin, "A simple wide-band on-chip inductor model for silicon based RF ICs," IEEE Trans. Microw. Theory Tech., vol. 551, no. 9, pp. 2023-2028, Sep. 2003.
2. T. Dhaene, J. Geest, and D. Zutter, "EM-based multidimensional parameterized model of general passive planar components," in IEEE Int. Microw. Symp. Dig., vol. 3, May 2001, pp. 1745-48.
3. C. Coelho, J. Phillips, and L. Silveira, "Robust rational function approximation algorithm for model generation," in Proc. Design Automation Conf., Jun. 1999, pp. 207-12.
4. F. Rotella, V. Blaschke, and D. Howard, "A broad-band scalable lumped-element inductor model using analytic expressions to incorporate skin effect, substrate loss, and proximity effect," in IEDM Tech. Dig., 2002, pp. 471-474.
5. F. Rotella, D. Howard, M. Racanelli, and P. Zampardi, "Characterizing and optimizing high Q inductors for RFIC design in silicon processes," in Proc. Radio Frequency Integrated Circuits Symp., Jun. 2003, pp. 339-342.
6. K. Lampaert, A. Brotman, P. Miliozzi, P. Singh, M. Matloubian, B. Bhattacharyya, F. Rotella, and R. Divecha, "Method and system for predictive layout generation for inductors with reduced design cycle," U.S. Patent 588 002, Jul. 2003.
7. H. Greenhouse, "Design of planar rectangular microelectronic inductors," IEEE Trans. Parts, Hybrids, Packag., vol. PHP-10, no. 6, pp. 101-109, Jun. 1974.
8. F. Grover, Inductance Calculations: Working Formulas and Tables. New York: Van Nostrand, 1946.
9. S. Kim and D. Neikirk, "A compact equivalent circuit model for the skin effect," in Int. Microw. Symp. Dig., Jun. 1996, pp. 1815-1818.
10. B. Sen and R. Wheeler, "Skin effect models for transmission line structures using generic SPICE circuit simulators," in Proc. IEEE Meeting Electrical Performance Electronic Packaging, Oct. 1998, pp. 128-131.
11. G. Antonini, A. Orlandi, and C. Paul, "Internal impedance of conductors of rectangular cross section," IEEE Trans. Microw. Theory Tech., vol. 47, no. 7, pp. 979-985, Jul. 1999.
12. T. Sakarui and K. Tamaru, "Simple formulas for two and three dimensional capacitances," IEEE Trans. Electron. Devices, vol. ED-30, no. 2, pp. 183-185, Feb. 1983.
13. N. Meijs and J. Fokkema, "VLSI circuit reconstruction from mask topology," VLSI J. Integration, vol. 2, no. 2, pp. 85-119, 1984.
14. E. Barke, "Line-to-ground capacitance calculation for VLSI: A comparison," IEEE Trans. Computer-Aided Design, vol. 7, no. 2, pp. 295-298, Feb. 1988.
15. K. Oh, D. Kuznetsov, and J. Schutt-Aine, "Capacitance computations in a multilayer dielectric medium using the close-form spatial Green's functions," IEEE Trans. Microw. Theory Tech., vol. 42, no. 8, pp. 1443-1453, Aug. 1994.
16. Raphael: Reference Manual, 4.1 ed: Technology Modeling Associates, Inc., 1997.
17. H. Bakoglu, Circuits, Interconnects, and Packaging for VLSI. Reading, MA: Addison-Wesley, 1990.
18. C. Yue and S. Wong, "A study on substrate effects of silicon-based RF passive components," in Int. Microw. Symp. Dig., vol. 4, Jun. 1999, pp. 1625-28.
19. J. Crols, P. Kinget, J. Cranninckx, and M. Steyaert, "An analytic model of planar inductors on lowly doping silicon substrates for high frequency analog design up to 3 GHz," in Symp. VLSI Tech. Dig., Jun. 1996, pp. 28-29.
20. M. Koolean, J. Geelen, and M. Versleijen, "An improved de-embedding technique for on-wafer high frequency characterization," in Proc. Bipolar Circuit Technology Meeting, Sep. 1991, pp. 188-191.
21. M. Danesh and J. Long, "Deferentially drive symmetric microstrip inductors," IEEE Trans. Microw. Theory Tech., vol. 50, no. 1, pp. 332-41, Jan. 2002.
22. J. Long, "Monolithic transformers for silicon RFIC design," J. Solid-State Circuits, vol. 35, no. 9, pp. 1368-82, Sep. 2000.
23. D. Edelstein and J. Burghartz, "Spiral and solenoidal inductor structures on silicon using CU-damascene interconnects," in Proc. Interconnect Technology Conf., Jun. 1998, pp. 18-20.
24. F. R. Rotella et al., "Design, characterization, modeling and validation of silicon on-wafer balun components under matched and unmatched conditions," in Proc. RFIC Symp., Jun. 2005.
25. C. P. Yue and S. S. Wong, "On-chip spiral inductors with patterned ground shields for Si-based RFICs," J. Solid-State Circuits, vol. 33, no. 5, pp. 743-752, May.
26. H. Y. Yang, "Design considerations of differential inductors in COS technology for RFIC," in Proc. Radio Frequency Integrated Circuits Symp., Jun. 2004, pp. 349-352.
27. P. Miliozzi, K. Kundert, K. Lampaert, P. Good, and M. Chian, "A design system for RFIC: Challenges and solutions," Proc. IEEE, vol. 88, no. 10, pp. 1613-32, Oct. 2000.
28. Using Matlab, 6.0 ed., The MathWorks, Inc., Natick, MA, 2000.
29. Optimization Toolbox: Users Guide, 6.0 ed., The MathWorks, Inc., Natick, MA, 2000.
30. Design Framework II User Guide, 5.0 ed., Cadence Design System, 2004.
31. Calibre Verification User's Manual, 2003.4 ed., Mentor Graphics, 2004.