Atomic layer-deposited Si-nitride/SiO2 stack gate dielectrics for future high-speed DRAM with enhanced reliability

IEEE Electron Device Letters

Volumn 26, Issue 8, 2005, Pages 538-540

  Nakajima, Anri ^a   Ohashi, Takuo ^b   Zhu, Shiyang ^a   Yokoyama, Shigeyuki ^b   Michimata, Shigetomi ^b   Miyake, Hideharu ^b  

^a HIROSHIMA UNIVERSITY   (Japan)

^b Elpida Memory Inc   (Japan)

Author keywords

Atomic layer deposition (ALD); DRAM; MOSFET; Si nitride; Stack gate dielectrics

Indexed keywords

DEPOSITION; DIELECTRIC MATERIALS; DYNAMIC RANDOM ACCESS STORAGE; ELECTRIC POTENTIAL; GATES (TRANSISTOR); HOLE MOBILITY; LEAKAGE CURRENTS; RELIABILITY; SEMICONDUCTOR JUNCTIONS; SILICA; SILICON NITRIDE;

ATOMIC LAYER DEPOSITION (ALD); STACK GATE DIELECTRICS;

MOSFET DEVICES;

EID: 23844543338     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2005.851822     Document Type: Article

References (7)

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