Hardware implementation of FAST-based reinforcement learning algorithm

Proceedings of the 2005 IEEE International Workshop on VLSI Design and Video Technology, IWVDVT 2005

Volumn , Issue , 2005, Pages 143-146

  Hwang, Kao Shing ^a   Hsu, Yuan Pao ^b   Hsieh, His Wen ^a   Lin, Hsin Yi ^a  

^a NATIONAL CHUNG CHENG UNIVERSITY   (Taiwan)

^b NATIONAL FORMOSA UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

FEEDBACK; FIELD PROGRAMMABLE GATE ARRAYS; HEURISTIC METHODS; LEARNING ALGORITHMS; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; NEURAL NETWORKS; PERSONAL COMPUTERS; PLASTICITY; TOPOLOGY; VECTORS;

ADAPTIVE HEURISTIC CRITIC (AHC); ADAPTIVE RESONANCE THEORY (ART); FLEXIBLE ADAPTABLE-SIZE TOPOLOGY (FAST); NEURONS;

LEARNING SYSTEMS;

EID: 23844518746     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. G. A. CARPENTER and S. GROSSBERG, "The ART of adaptive pattern recognition by a self-organizing neural network," IEEE Computer, 21(3), pp77-88, March 1988.
2. Barto, Andrew G., Sutton, Richard S. and Anderson, Charles W., "Neuronlike adaptive elements that can solve difficult learning control problems." IEEE Transactions on System, Man, and Cybernetics SMC-13: 834-846. 1983
3. A. Pérez-Uribe, Structure-adaptable digital neural networks, PhD Thesis 2052, Swiss Federal Institute of Technology-Lausanne, Lausanne, 1999.
4. A. Perez and E. Sanchez, "The FAST architecture: a neural network with flexible adaptable-size topology," Proceedings of Fifth International Conference on Microelectronics for Neural Networks, pp. 337-340, 12-14 Feb. 1996
5. A. E. Alpaydin, Neural models of incremental supervised and unsupervised learning. PhD thesis, Swiss Federal Institute of Technology-Lausanne, Lausanne, DPFL, 1990. Thesis 863. R. S. Sutton and A.G. Barto, Reinforcement Learning. The MIT Press, 1998.