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Volumn 11, Issue 6, 2005, Pages 916-925

On theoretical upper bounds for routing estimation

Author keywords

Algorithms; CAD; Global routing; Integrated circuits

Indexed keywords


EID: 23844479533     PISSN: 0958695X     EISSN: 09486968     Source Type: Journal    
DOI: None     Document Type: Review
Times cited : (1)

References (12)
  • 3
    • 0033703894 scopus 로고    scopus 로고
    • Wiring space and length estimation in two-dimensional arrays
    • [Cho 00] May
    • [Cho 00] J. D. Cho: "Wiring space and length estimation in two-dimensional arrays"; IEEE Transactions on Computer-Aided Design, 19(5), pp. 612-615, May, 2000.
    • (2000) IEEE Transactions on Computer-aided Design , vol.19 , Issue.5 , pp. 612-615
    • Cho, J.D.1
  • 4
    • 0019610041 scopus 로고
    • A stochastic model for interconnections in custom integrated circuits
    • [Gamal 81]
    • [Gamal 81] A.A. El Gamal and Z.A. Syed: "A stochastic model for interconnections in custom integrated circuits"; IEEE Transactions on Circuits & Systems, 28(9), pp. 888-894, 1981.
    • (1981) IEEE Transactions on Circuits & Systems , vol.28 , Issue.9 , pp. 888-894
    • El Gamal, A.A.1    Syed, Z.A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.