|
Volumn , Issue , 2003, Pages 349-354
|
Effect of diffusion barriers on electrical performance and reliability of Cu metallization in 0.13 μn Cu/ Ultra-low k technology
a b a a a a a a a a a a a |
Author keywords
[No Author keywords available]
|
Indexed keywords
DIELECTRIC FLASH LAYER (DFL);
NON-PATTERN WAFERS;
VOLTAGE RAMP TEST;
CHEMICAL MECHANICAL POLISHING;
DIFFUSION;
METALLIZING;
PHYSICAL VAPOR DEPOSITION;
RELIABILITY;
SILICON COMPOUNDS;
SURFACE ROUGHNESS;
COPPER;
|
EID: 23844474785
PISSN: 15401766
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (3)
|
References (4)
|