Improved voltage margins using linear error-correcting codes in resistor-logic demultiplexers for nanoelectronics

Nanotechnology

Volumn 16, Issue 9, 2005, Pages 1419-1432

  Kuekes, Philip J ^a   Robinett, Warren ^a   Williams, R Stanley ^a  

^a HEWLETT PACKARD LABORATORIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CODES (STANDARDS); DIGITAL CIRCUITS; ELECTRIC NETWORK ANALYSIS; ELECTRIC POTENTIAL; ERROR ANALYSIS; NANOSTRUCTURED MATERIALS; RESISTORS;

DEMUX CIRCUITS; LINEAR ERROR-CORRECTING CODES; NANOELECTRONICS; RESISTOR-LOGIC DEMULTIPLEXERS;

DEMULTIPLEXING;

EID: 23444432868     PISSN: 09574484     EISSN: None     Source Type: Journal    
DOI: 10.1088/0957-4484/16/9/001     Document Type: Article

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