VLSI architectures for block matching algorithms

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 1001, Issue , 1988, Pages 882-891

  Pirsch, P ^a   Komarek, T ^a  

^a LEIBNIZ UNIVERSITY HANNOVER   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 2342623592     PISSN: 0277786X     EISSN: 1996756X     Source Type: Conference Proceeding    
DOI: 10.1117/12.969039     Document Type: Conference Paper

References (12)

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3. J. J. Jain, A. K. Jain, "Displacement Measurement and Its Application in Inter - frame Image Coding, IEEE Trans. on Comm., vol. COM-29, pp. 1799-1808, July 1981
4. M. Bierling, R. Thoma, "Motion Compensating Field Interpolation Using a Hierarchical Structured Displacement Estimator," Signal Processing, vol. 11, pp. 387-404, 1986
5. S. Y. Kung: VLSI Array Processors. Prentice Hall, Englewood Cliffs, 1988
6. F. May, "Full Motion 64 kbit /s Video Codec with 8 DSP’s," International Workshop on 64 kbit /s Coding of Moving Video, Hannover, FRG, June 1988
7. H. Volkers, T. Wehberg, "Architektur eines Prozessors für die Echtzeit-Verarbeitung von Algorithmen der Bildcodierung," ITG-Diskussionssitzung, Königstein, FRG, Nov. 1987
8. R. Dianysian, R. Baker, J. L. Salinas, "A VLSI Architecture For Template Matching and Motion Estimation", ISCAS’88, Helsinki, Finland, June 1988
9. W. Schwerzel, "Prozessorarchitektur zur Bewegungsvektorsuche in der digitalen Bildanalyse," ITG-Fachberichte № 98, Großintegration, pp. 221-225, vde-Verlag 1987
10. G. Roth, P. Tholin, B. Wirén, "A VLSI for Motion Compensation", Picture Coding Symposium, Stockholm, Sweden, 1987
11. J. Kraus, H. Wendt, "VLSI-Multiprozessor zur Bewegungsvektorsuche für Experimente am 64 kbit /s ISDN Bildtelefon", to be presented at the ITG conference "Mikroelektronik für die Informationstechnik ", Berlin, FRG, Oct. 1988
12. LSI Logic Coorporation: LSI-Logic Databook and Design Manual, 1988