Thermal characterization of stacked-die packages

Annual IEEE Semiconductor Thermal Measurement and Management Symposium

Volumn 20, Issue , 2004, Pages 55-63

  Zhang, Li ^a   Howard, Noella ^a   Gumaste, Vijaylaxmi ^a   Poddar, Anindya ^a   Nguyen, Luu ^a  

^a NATIONAL SEMICONDUCTOR CORPORATION   (United States)

Author keywords

Finite element analysis; Stacked die package; Thermal characterization

Indexed keywords

HEAT FLOW RATES; POWER CONSUMPTION; STACKED DIE PACKAGES; THERMAL CHARACTERIZATION;

BOUNDARY CONDITIONS; COMPUTATIONAL FLUID DYNAMICS; COMPUTER SIMULATION; DIES; FINITE ELEMENT METHOD; HEAT RESISTANCE; HEAT TRANSFER; HEATING; MATHEMATICAL MODELS; SEMICONDUCTOR JUNCTIONS; THERMAL CONDUCTIVITY; THERMODYNAMICS;

MULTICHIP MODULES;

EID: 2342531628     PISSN: 10652221     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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