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Volumn 5, Issue 3, 2000, Pages 735-747

Efficient routability check algorithms for segmented channel routing

Author keywords

[No Author keywords available]

Indexed keywords


EID: 23044523991     PISSN: 10844309     EISSN: None     Source Type: Journal    
DOI: 10.1145/348019.348574     Document Type: Article
Times cited : (8)

References (12)
  • 2
    • 0026982304 scopus 로고
    • New channel segmentation model and associated routing algorithm for high performance FPGAs
    • (ICCAD '92, Santa Clara, CA, Nov. 8-12), L. Trevillyan, Ed. IEEE Computer Society Press, Los Alamitos, CA
    • BURMAN, S., KAMALANATHAN, C., AND SHERWANI, N. 1992. New channel segmentation model and associated routing algorithm for high performance FPGAs. In Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design (ICCAD '92, Santa Clara, CA, Nov. 8-12), L. Trevillyan, Ed. IEEE Computer Society Press, Los Alamitos, CA, 22-25.
    • (1992) Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design , pp. 22-25
    • Burman, S.1    Kamalanathan, C.2    Sherwani, N.3
  • 8
    • 0028735216 scopus 로고
    • Design and analysis of segmented routing channels for row-based FPGA's
    • PEDRAM, M., NOBANDEGANI, B. S., AND PREAS, B. T. 1994. Design and analysis of segmented routing channels for row-based FPGA's. IEEE Trans. Comput.-Aided Des. 13, 12 (Dec.), 1470-1479.
    • (1994) IEEE Trans. Comput.-Aided Des. , vol.13 , Issue.12 DEC , pp. 1470-1479
    • Pedram, M.1    Nobandegani, B.S.2    Preas, B.T.3
  • 10
    • 0027699388 scopus 로고
    • A bounded search algorithm for segmented channel routing for FPGA's and associated channel architecture issues
    • ROY, K. 1993. A bounded search algorithm for segmented channel routing for FPGA's and associated channel architecture issues. IEEE Trans. Comput.-Aided Des. 12, 11, 1695-1705.
    • (1993) IEEE Trans. Comput.-Aided Des. , vol.12 , Issue.11 , pp. 1695-1705
    • Roy, K.1
  • 12
    • 0026998803 scopus 로고
    • On channel segmentation design for row-based FPGAs
    • (ICCAD '92, Santa Clara, CA, Nov. 8-12), L. Trevillyan, Ed. IEEE Computer Society Press, Los Alamitos, CA
    • ZHU, K. AND WONG, D. F. 1992. On channel segmentation design for row-based FPGAs. In Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design (ICCAD '92, Santa Clara, CA, Nov. 8-12), L. Trevillyan, Ed. IEEE Computer Society Press, Los Alamitos, CA, 26-29.
    • (1992) Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design , pp. 26-29
    • Zhu, K.1    Wong, D.F.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.