An algorithm for trading off quantization error with hardware resources for MATLAB-based FPGA design

IEEE Transactions on Computers

Volumn 54, Issue 7, 2005, Pages 886-896

  Roy, Sanghamitra ^a   Banerjee, Prith ^b  

^a UNIVERSITY OF WISCONSIN MADISON   (United States)

^b 1120 Science and Engineering Offices   (United States)

Author keywords

Automation; Field programmable gate arrays; Fixed point arithmetic; Floating point arithmetic; Quantization

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER HARDWARE; COMPUTER SIMULATION; DIGITAL ARITHMETIC; DIGITAL SIGNAL PROCESSING;

FIXED POINT ARITHMETIC; QUANTIZATION ERROR;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 22944451453     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2005.106     Document Type: Article

References (34)

1. Altera, "Stratix Datasheet," www.altera.com, Sept. 2004.
2. M. Haldar, A. Nayak, A. Choudhary, and P. Banerjee, "A System for Synthesizing Optimized FPGA Hardware from MATLAB," Proc. Int'l Conf. Computer Aided Design, Nov. 2001, see also www.ece.northwestern.edu/cpdc/Match/Match.html.
3. Mathworks Corp., "MATLAB Technical Computing Environment," www.mathworks.com, Jan. 2003.
4. Synplicity, "Synplify Pro Datasheet," www.synplicity.com, Nov. 2002.
5. Xilinx, "Virtex II Datasheet," www.xilinx.com, July 2001.
6. L.B. Jackson, "On the Interaction of Roundoff Noise and Dynamic Range in Digital Filters," Bell System Technical J., pp. 159-183, Feb. 1970.
7. A.V. Oppenheim, R.W. Schafer, and J.R. Buck, Discrete-Time Signal Processing, second ed. Prentice Hall, 1999.
8. K.H. Chang and W.G. Bliss, "Finite Word-Length Effects of Pipelined Recursive Digital Filters," IEEE Trans. Signal Processing, vol. 42, no. 8, pp. 1983-1995, Aug. 1994.
9. L.B. Jackson, K.H. Chang, and W.G. Bliss, "Comments on 'Finite Word-Length Effects of Pipelined Recursive Digital Filters," IEEE Trans. Signal Processing, vol. 43, no. 12, pp. 3031-3032, Dec. 1995.
10. R.M. Gray and D.L. Neuhoff, "Quantization," IEEE Trans. Information Theory, vol. 44, no. 6, pp. 2325-2383, Oct. 1998.
11. W. Sung and K.I. Kum, "Simulation-Based Word-Length Optimization Method for Fixed-Point Digital Signal Processing Systems," IEEE Trans. Signal Processing, vol. 43, no. 12, Dec. 1995.
12. S. Kim and W. Sung, "Fixed-Point Error Analysis and Wordlength Optimization of a Distributed Arithmetic Based 8X8 2D-IDCT Architecture," Proc. Workshop VLSI Signal Processing, IX, pp. 398-407, 1996.
13. H. Keding, M. Willems, M. Coors, and H. Meyr, "FRIDGE: A Fixed-Point Design and Simulation Environment," Proc. Design, Automation, and Test in Europe, pp. 429-435, 1998.
14. Cocentric System, http://www.synopsys.com, July 2003.
15. L. De Coster, M. Ade, R. Lauwereins, and J. Peperstraete, "Code Generation for Compiled Bit-True Simulation of DSP, Applications," Proc. 11th Int'l Symp. System Synthesis, pp. 9-14, 1998.
16. C. Shi, "Statistical Method for Floating-Point to Fixed Point Conversion," MS thesis, Electrical Eng. and Computer Science Dept., Univ. of California, Berkeley, 2002.
17. P. Banerjee, M. Haldar, A. Nayak, V. Kim, V. Saxena, R. Anderson, and J. Uribe, "AccelFPGA: A DSP Design Tool for Making Area Delay Tradeoffs while Mapping MATLAB Programs onto FPGAs," Proc. Int'l Signal Processing Conf. (ISPC) and Global Signal Processing Expo (GSPx), 2003.
18. J. Babb, M. Rinard, C.A. Moritz, W. Lee, M. Frank, R. Barua, and A. Amarasinghe, "Parallelizing Applications into Silicon," Proc. FPGA Based Custom Computing Machines (FCCM), Apr. 1999.
19. D. Brooks and M. Martonosi, "Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance," Proc. High Performance Computer Architecture (HPCA), Jan. 1999.
20. A. Nayak, M. Haldar, A. Choudhary, and P. Banerjee, "Precision and Error Analysis of MATLAB Applications during Automated Hardware Synthesis for FPGAs," Proc. Design Automation and Test in Europe (DATE 2001), Mar. 2001.
21. P. Banerjee, D. Bagchi, M. Haldar, A. Nayak, V. Kim, and R. Uribe, "Automatic Conversion of Floating Point MATLAB Programs into Fixed Point FPGA Based Hardware Design," Proc. FPGA Based Custom Computing Machines (FCCM), 2003.
22. "Synplify Pro 7.2 Datasheet," Synplicity Corp., www.synplicity. com, Nov. 2002.
23. G.A. Constantinides, P.Y.K. Cheung, and W. Luk, "Optimum Wordlength Allocation," Proc. FPGA Based Custom Computing Machines (FCCM), 2002.
24. G.A. Constantinides, "Perturbation Analysis for Word-Length Optimization," Proc. FPGA Based Custom Computing Machines (FCCM), 2003.
25. M.L. Chang and S. Hauck, "Precis: A Design-Time Precision Analysis Tool," Proc. FPGA Based Custom Computing Machines (FCCM), 2002.
26. L. Codrescu and S. Wills, "Profiling for Input Predictable Threads," Proc. Int'l Conf. Computer Design (ICCD-98), Oct. 1998.
27. R.B. Hildendorf, G.J. Heim, and W. Rosenstiel, "Evaluation of Branch Prediction Using Traces for Commercial Applications," IBM J. Research and Development, vol. 43, no, 4, 1999.
28. S. Gupta and F.N. Najm, "Power Macromodeling for High Level Power Estimation," Proc. 34th Design Automation Conf., pp. 365-370, June 1997.
29. G.A. Constantinides, P.Y.K. Cheung, and W. Luk, "The Multiple Wordlength Paradigm," Proc. IEEE Symp. Field-Programmable Custom Computing Machines, 2001.
30. M. Stephenson, J. Babb, and S. Amarasinghe, "Bitwidth Analysis with Application to Silicon Compilation," Proc. SIGPLAN Conf. Programming Language Design and Implementation, June 2000.
31. K.-I. Kum and W. Sung, "Combined Word-Length Optimization and High-Level Synthesis of Digital Signal Processing Systems," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, Aug. 2001.
32. C. Shi and R.W. Brodersen, "Automated Fixed-Point Data-Type Optimization Tool for Signal Processing and Communication Systems," Proc. 41st Design Automation Conf., June 2004.
33. S. Roy and P. Banerjee, "An Algorithm for Converting Floating-Point Computations to Fixed-Point in MATLAB Based FPGA Design," Proc. 41st Design Automation Conf., 2004.
34. Alta Group, "Fixed-Point Optimizer User's Guide," Cadence Design Systems, Inc., Sunnyvale, Calif., Aug. 1994.