Low power synthesis of finite state machines with mixed D and T flip-flops

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn 2003-January, Issue , 2003, Pages 803-808

  Iranli, A ^a   Rezvani, P ^b   Pedram, M ^a  

^a Univ of Southern California ^*  (United States)

^b MAGMA DESIGN AUTOMATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; ELECTRIC POWER UTILIZATION; LOGIC CIRCUITS; STATE ASSIGNMENT;

ASSIGNMENT TECHNIQUE; DYNAMIC POWER CONSUMPTION; ENCODING ALGORITHMS; GRAY CODES; LOW-POWER SYNTHESIS; STATE MACHINE;

FLIP FLOP CIRCUITS;

EID: 22944448871     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2003.1195128     Document Type: Conference Paper

References (11)

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