Power modelling in field programmable gate arrays (FPGA)

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1673, Issue , 1999, Pages 396-404

  Garcia, Andrés ^a   Burleson, Wayne ^b   Danger, Jean Luc ^a  

^a TELECOM PARISTECH   (France)

^b UNIVERSITY OF MASSACHUSETTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER CIRCUITS; ELECTRIC POWER UTILIZATION;

EXISTING ARCHITECTURES; FPGA ARCHITECTURES; IN-FIELD; POWER CONSUMPTION MODEL; POWER-SENSITIVE;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 22844457006     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-48302-1_44     Document Type: Conference Paper

References (16)

1. Altera. Flex10K Data Sheet and Max+PlusII. Altera Corporation. 1998.
2. E. Boemo, G. Gonzalez de Rivera, S. Lopez-Buedo, J. Meneses. Some Notes on Power Management on FPGA-based Systems. Proceedings of FPL'95
3. S. D. Brown, R. J. Francis, J. Rose, Z. G. Vranesic. Field Programmable Gate Arrays. Kluwer Academic Publishers. 1992.
4. T. Callahan, P. Chong, A. DeHon, J. Wawrzynek. Fast Module Mapping and Placement for Datapaths in FPGAs. Proceedings FPGA'98
5. G. Kélemen. Conception des circuits intégrés pour la basse consommation: Méthodes comparées. PhD Dissertation. E.N.S.T. 1997. Paris, France.
6. S. R. Park, W. Burleson. Configuration Cloning: Exploiting Regularity in Dynamic DSP Architectures. FPGA'99
7. Jan Rabaey. Digital Integrated Circuits; a design perspective. Prentice Hall. 1996.
8. W. Röthig. Modélisation Comportamentale de Consommation des Circuits Numériques. PhD Dissertation. E.N.S.T. 1994. Paris, France.
9. Sedra, Smith. Microelectronics Circuits. Saunders College Publishing. 1989.
10. S. Singh, P. Bellec. Virtual Hardware for graphics Applications Using FPGAs.
11. S. Singh. Architectural Description for FPGA Circuits. FCCM'95
12. K Skahill. VHDL for programmable Logic. Addison Wesley. 1996.
13. C. C. Wang, C. P. Kwan. Low Power Technology Mapping by Hiding High-Transition Paths in Invisible Edges for LUT-based FPGAs. ISCAS'97
14. Vaughn Betz, J. Rose. VPR: A New Packing, Placement and Routing Tool for FPGA research. Proceedings FPL'97
15. N. Weste, K. Eshraghian. Principles of CMOS VLSI Design. A system perspective. Mc Graw Hill. 1995.
16. Xilinx. XC4000E/EX/XL Data Sheet and Xilinx Foundation. Xilinx Corporation. 1998.