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Volumn 4, Issue 3, 1999, Pages 231-256

Code generation of nested loops for DSP processors with heterogeneous registers and structural pipelining

Author keywords

Code generation; DSP

Indexed keywords


EID: 22844454276     PISSN: 10844309     EISSN: None     Source Type: Journal    
DOI: 10.1145/315773.315776     Document Type: Article
Times cited : (5)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.