Self-organizing maps for embedded processor selection

Microprocessors and Microsystems

Volumn 29, Issue 7, 2005, Pages 307-315

  Martín Del Brío, Bonifacio ^a   Bono Nuez, Antonio ^a   Medrano Marqués, Nicolás ^a  

^a UNIVERSITY OF ZARAGOZA   (Spain)

Author keywords

Embedded processors; Microprocessor and microcontroller selection; Neural networks

Indexed keywords

ALGORITHMS; DATABASE SYSTEMS; DIGITAL SIGNAL PROCESSING; EMBEDDED SYSTEMS; MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; NEURAL NETWORKS; SEMICONDUCTOR DEVICE MANUFACTURE;

EMBEDDED PROCESSORS; MICROPROCESSOR AND MICROCONTROLLER SELECTION; TIMERS; TWO-DIMENSIONAL MAPS;

SELF ORGANIZING MAPS;

EID: 22644433769     PISSN: 01419331     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.micpro.2004.11.001     Document Type: Article

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