Architectures for analog VLSI implementation op neural networks for solving linear equations with inequality constraints

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 3, Issue , 1992, Pages 1529-1532

  Cichocki, A ^a   Ramirez Angulo, J ^b   Unbehauen, R ^c  

^a WARSAW UNIVERSITY OF TECHNOLOGY   (Poland)

^b NEW MEXICO STATE UNIVERSITY   (United States)

^c UNIVERSITY OF ERLANGEN NUREMBERG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

CONSTRAINT THEORY; DIFFERENTIAL EQUATIONS; LINEAR EQUATIONS; OPERATIONAL AMPLIFIERS;

ALGORITHM FOR SOLVING; ANALOG VLSI; CMOS TECHNOLOGY; GENERALIZED SYSTEMS; INEQUALITY CONSTRAINT; LINEAR INEQUALITIES; OTA-BASED;

VLSI CIRCUITS;

EID: 2242480138     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.1992.230208     Document Type: Conference Paper

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