Implementation of a failure model validation technique using a discrete-event batch simulator : Application to semiconductor manufacturing

Computer Aided Chemical Engineering

Volumn 9, Issue C, 2001, Pages 117-122

  Charles, A S ^a   Azzaro Pantel, C ^a   Domenech, S ^a   Pibouleau, L ^a   Floquet, P ^a   Jaume, D ^b   Tilhac, F ^b  

^a LABORATOIRE DE GÉNIE CHIMIQUE   (France)

^b MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 2242437726     PISSN: 15707946     EISSN: None     Source Type: Book Series    
DOI: 10.1016/S1570-7946(01)80015-8     Document Type: Article

References (7)

1. Charles A.S. INPT, PhD Thesi (2000)
2. Murphy R., Saxena P., and Lewinson W. Semiconductor International (1996) 12
3. Navarre D., Pantel M., Bérard F., Pantel C., and Pibouleau L. 17th IASTED Int. Conference, MIC'98. Grindelwald Switzerlan (1998)
4. Newton D.W. Reliability Engng and System Safety 34 (1991) 7
5. Pellegrin C. Fondements de la décision de la maintenance. Economic (1997)
6. TPM, La maintenance productive (1991), Masson
7. Tan J.S., and Kramer M.A. Reliability Engineering and System Safety 49 (1995) 155-169